1. Technical Field
This invention relates to integrated circuits, and more particularly, to techniques for implementing embedded test functionality within integrated circuits having multiple processor cores and cache memories.
2. Description of the Related Art
Integrated circuits, which may include microprocessors and other digital logic devices as well as analog and mixed-signal devices, may generally include a significant number of semiconductor components manufactured through complex fabrication processes. As manufacturing geometries shrink, complex designs including hundreds of millions of interconnected transistor devices become feasible. However, advances in integrated circuit density and design and manufacturing complexity significantly increase the challenge of ensuring that the resulting device is functional, reliable and capable of operating within expected performance and environmental parameters.
For example, as microprocessor implementations become increasingly sophisticated, it may become more difficult to functionally verify the design, as increased functional complexity may lead to a greater number of possibilities for error in implementation. Likewise, as device geometries shrink, opportunities for manufacturing defects increase due to manufacturing environment impurities, process inconsistency, and other factors.
Integrated circuits are often tested during the manufacturing process through the use of a test environment including sophisticated and expensive automated test equipment. However, reliance on such test equipment may represent a significant time and economic cost in the manufacture of complex integrated circuits. For example, test equipment is often a limited resource within a test environment. If increased integrated circuit complexity requires an increased number of tests or duration of testing for a given circuit, overall manufacturing throughput may be correspondingly decreased, which may raise manufacturing costs. Alternatively, if the number of tests to be run is constrained to reduce overall testing time, product reliability may be impaired (e.g., if a defective product fails to be detected as such). Further, test equipment is generally an expensive resource whose cost scales with the complexity of the testing being performed. An integrated circuit with a large number of high-speed interface pins, for example, may thus require more expensive test equipment to adequately test the design, which may in turn increase manufacturing costs.